DM355 SPI DRIVER

Tuesday, November 23, 5: Urgent help needed here!!!! No license, either express or implied, by estoppel or otherwise, is granted by TI. Aug 5, 4: It is outside of the screen in the picture above but the processor later tries to read the SPI memory in 16 bit mode.

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Aug 3, 7: We are glad that we were able to resolve this issue, and will now proceed to close this thread. Mar 2, 8: Jul 26, 2: In reply to Gennadiy Kiryukhin: This is because several of the pins of the device are multiplexed, therefore depending on the features you are using, you may only get 1 SPI interface supported.

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Additional info for DM355 SPI Boot

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If it helps i have tested before the spi patch V5 from Brian Niebuhr and the problem was already there So is this a bug or a feature? Use of the information on this site may require a license from a third party, or a license from TI. TI is a global semiconductor design and manufacturing company. If you have a related question, please click the ” Ask a related question ” button in the top right corner. I don’t have time right know to work on that problem but i can test solutions if anyone have.

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Typically, first 8 bytes are used for MAC address and thus could be anything. In reply to Anand Kulkarni TI is a global semiconductor design and manufacturing company. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right.

Do I need to use a different magic number? But more details can be grabbed from SPI Controller driver in kernel or from chip-set datasheet.

The SPI Boot you refer to, says that it first tries 24 bit sspi and reads the first byte. Ask a related question Ask a new question.

[3/6] DaVinci: Update for SPI support on DM SOC – Patchwork

By this, hardware and communication can be verified. If you have further questions related to this thread, you may click “Ask a related question” below. Menu Search through millions of questions and answers User. Because of that I am not sure how the chip can read the first byte and determine if it has to switch to bit addressing mode.

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In reply to joeswi:. I cannot figure out how the SPI boot works. In reply to Gennadiy Kiryukhin:.

Additional info for DM SPI Boot – Processors forum – Processors – TI E2E Community

Why reading only 4 bytes? Use of the information on this site may require a license from a third party, or a license from TI. I need to make it work. In reply to Veeranna Hanchinal:.

Content on this site may contain or be subject to specific guidelines or limitations on use. No license, either express or implied, by estoppel or otherwise, is granted by TI. All postings and use of the dm35 on this site are subject to the Terms of Use of the site; third parties using this content agree to abide by psi limitations or guidelines and to comply with the Terms of Use of this site.